tst_tab.v
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////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module: tst_tab.v
// description: dumps out tst i/o .tab file
//
// designer: Tony DeLaurier
// date: 12/10/94
//
////////////////////////////////////////////////////////////////////////
module tst_tab();
integer tab_file_ptr;
// open tab file and dump header
initial
begin
tab_file_ptr = $fopen("tst000.tab");
// dump out header
$fwriteh(tab_file_ptr, "#\n");
$fwriteh(tab_file_ptr, "# tst tab file\n");
$fwriteh(tab_file_ptr, "#\n");
$fwriteh(tab_file_ptr, "clock @C 1(8) 0(8)\n");
$fwriteh(tab_file_ptr, "pad_reset_l @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "test @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "ad16_data_in[14:0] @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "ad16_enable_l @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "ad16_read_l @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "ad16_write_l @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "c_ctl_en @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "c_ctl_i[5:0] @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "c_ctl_ld @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "bist_flag @I @E 2 @C clock\n");
$fwriteh(tab_file_ptr, "tst_ad16_enable_l @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_ad16_read_l @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_ad16_write_l @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_by_pass @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_bist_mode @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_iost_mode @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_rac_reset @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_ext_be @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_c_ctl_en @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_c_ctl_i[5:0] @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_c_ctl_ld @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_synclk_set @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_pwr_up @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_idd_test @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_0 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_1 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_2 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_3 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_4 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_5 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_6 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_7 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_8 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "tst_reset_l_9 @O @S 15 @C clock\n");
$fwriteh(tab_file_ptr, "\n");
end // initial
// dump tst at pos edge of clock
always @(posedge reality.rcp_0.tst_0.clock)
begin
$fwriteh(tab_file_ptr,
reality.rcp_0.tst_0.pad_reset_l,," ",
reality.rcp_0.tst_0.test,,
"0x", reality.rcp_0.tst_0.ad16_data_in,,
reality.rcp_0.tst_0.ad16_enable_l,,
reality.rcp_0.tst_0.ad16_read_l,,
reality.rcp_0.tst_0.ad16_write_l,,
reality.rcp_0.tst_0.c_ctl_en,,
"0x", reality.rcp_0.tst_0.c_ctl_i,,
reality.rcp_0.tst_0.c_ctl_ld,,
reality.rcp_0.tst_0.bist_flag,," ",
reality.rcp_0.tst_0.tst_ad16_enable_l,,
reality.rcp_0.tst_0.tst_ad16_read_l,,
reality.rcp_0.tst_0.tst_ad16_write_l,,
reality.rcp_0.tst_0.tst_by_pass,,
reality.rcp_0.tst_0.tst_bist_mode,,
reality.rcp_0.tst_0.tst_iost_mode,,
reality.rcp_0.tst_0.tst_rac_reset,,
reality.rcp_0.tst_0.tst_ext_be,,
reality.rcp_0.tst_0.tst_c_ctl_en,,
"0x", reality.rcp_0.tst_0.tst_c_ctl_i,,
reality.rcp_0.tst_0.tst_c_ctl_ld,,
reality.rcp_0.tst_0.tst_synclk_set,,
reality.rcp_0.tst_0.tst_pwr_up,,
reality.rcp_0.tst_0.tst_idd_test,,
reality.rcp_0.tst_0.tst_reset_l_0,,
reality.rcp_0.tst_0.tst_reset_l_1,,
reality.rcp_0.tst_0.tst_reset_l_2,,
reality.rcp_0.tst_0.tst_reset_l_3,,
reality.rcp_0.tst_0.tst_reset_l_4,,
reality.rcp_0.tst_0.tst_reset_l_5,,
reality.rcp_0.tst_0.tst_reset_l_6,,
reality.rcp_0.tst_0.tst_reset_l_7,,
reality.rcp_0.tst_0.tst_reset_l_8,,
reality.rcp_0.tst_0.tst_reset_l_9,,
"\n");
end // always
endmodule // tst_tab