// $Header: /root/leakn64/depot/rf/hw/debug/xilinx/MUXCY_L.v,v 1.1 2003/04/01 21:47:34 berndt Exp $

/*

FUNCTION	: 2 to 1 Multiplexer for Carry Logic

*/

`timescale  100 ps / 10 ps


module MUXCY_L (LO, CI, DI, S);

    output LO;
    reg    lo_out;

    input  CI, DI, S;

    buf B1 (LO, lo_out);

	always @(CI or DI or S) begin
	    if (S)
		lo_out <= CI;
	    else
		lo_out <= DI;
	end

    specify
	(CI => LO) = (1, 1);
	(DI => LO) = (1, 1);
	(S  => LO) = (1, 1);
    endspecify

endmodule