RSP Functional Simulator

This collection of modules implements a functional simulator in C of
the RSP part of the RCP. The idea is that this simulator exists in a
standalone fashion to develop microcode and algorithms, but will also
grow to be connected to hardware simulations, in a manner TBD.

The std_* modules are the standalone parts, used primarily for initial
development. The other parts should map one-to-one to the functional
blocks on the chip, in preparation for hardware or mixed-mode
simulation.

The basic algorithm is this: the RSP receives/retrieves a task list
(block of instructions) from the DRAM via the R4200. This task list is
loaded into the instruction cache and interpreted. These instructions
may load stuff into the data cache for operation. Output will go to
the RDP, buffered somehow. Probably just a block of display list type
data, but these details are TBD.

In the meantime, the input and output are faked to UNIX files or
something similar. As the simulator gets more powerful, we can connect
it to something that can generate real microcode, or to something that
can draw (output).