su.h
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/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
*************************************************************************/
/*
* File: su.h
* Creator: hsa@sgi.com
* Create Date: Wed Feb 9 13:40:43 PST 1994
*
* Include file for the scalar unit module.
*
*/
#ifndef _rsp_su_h_
#define _rsp_su_h_ 1
/*
* RSP Scalar Unit registers. (these can be thought of as the
* "general-purpose" registers in the R4K architecture, the
* VU is implemented as COP2 and has it's own registers.
*
* The RSP registers are 32-bits. (should they be signed?)
*
*/
/*
* holds integer multiply/divide results:
*/
extern i32 rsp_LO, rsp_HI;
/*
* General-purpose registers.
* r0 always holds 0, acts like /dev/null
* r31 is the link register for Jump and Link instructions.
* It should not be used by other instructions.
*/
extern i32 rsp_GPR[35];
extern void rsp_SuInit(int init_regs);
extern boolean rsp_SUIsStalled(void);
/*
* The following routines implement the SU instructions. They
* are grouped according to instruction "type".
*/
/*
* J, JAL, BEQ, BNE, BLEZ, BGTZ
*/
extern void rsp_SuRegularJump(u32 inst);
/*
* ADDI, ADDIU, SLTI, SLTIU, ANDI, ORI, XORI, LUI
*/
extern void rsp_SuRegularArith(u32 inst);
/*
* LB, LBU, LH, LHU, LW
*/
extern void rsp_SuRegularLoad(u32 inst);
/*
* SB, SH, SW
*/
extern void rsp_SuRegularStore(u32 inst);
/*
* LWC2, SWC2
*/
extern void rsp_SuRegularCOP2(u32 inst, u32 pc);
/*
* ADD, ADDU, SUB, SUBU, SLT, SLTU, AND, OR, XOR, NOR
*/
extern void rsp_SuSpecialArithR(u32 inst);
/*
* MULT, MULTU, DIV, DIVU, MFHI, MTHI, MFLO, MTLO
*/
extern void rsp_SuSpecialArith(u32 inst);
/*
* JR, JALR
*/
extern void rsp_SuSpecialJump(u32 inst);
/*
* BREAK
*/
extern void rsp_SuSpecialBreak(u32 inst);
/*
* SLL, SRL, SRA, SLLV, SRLV, SRAV
*/
extern void rsp_SuSpecialShift(u32 inst);
/*
* BLTZ, BGEZ, BLTZAL, BGEZAL
*/
extern void rsp_SuRegimmJump(u32 inst);
/*
* CP0 Coprocessor instructions are actually SU instructions...
*/
extern void rsp_SuCOP0(u32 inst);
/*
* Coprocessor moves are actually SU instructions...
*/
extern void rsp_SuCOP2Move(u32 inst, u32 pc);
/*
* actually execute an SU instruction:
*/
extern void rsp_SUExec(u32 inst, u32 pc);
/*
* Debugging operations.
*/
extern i32 rsp_SuGPRGet(i16 reg);
extern i32 rsp_SuGPRSet(i16 reg, i32 value);
#endif