pifdebug1.s 1.75 KB
#include "sys/regdef.h"
#include "sys/asm.h"

        .text
        .set noat			# allows us to use register $1 ($at)
        .set noreorder	

LEAF (Boot)                       	# Address = 0xBFC00000.

 #
 # Rom entry point; on reset, the R4300 fetches instructions starting at 
 # address 0xbfc00000; we loop, telling the R4300 to fetch known data from a
 # high PIF rom address.
 #

rdloop:	lui	s0, 0xbfc0
	sw	t0, 0x400(s0)
	sw	t1, 0x404(s0)
	sw	t2, 0x408(s0)
	sw	t3, 0x40c(s0)
	sw	t4, 0x410(s0)
	sw	t5, 0x414(s0)
	j	rdloop

 #
 # Now prepare a default interrupt exception vector table.  There are three 
 # types of exceptions in all, user tlb miss, extended address tlb miss,
 # and all others.  The condition codes in the CAUSE register will be set.
 #
 # Each exception will simply spin forever, jumping back to its entry point
 # (making it easy to capture which exception was triggered by looking at the
 # memory bus address on a logic analyzer).
 #

        .align      9                   # Align to start of the vector table.

	                                # Address = 0xBFC00200.
	lui	s0, 0xbfc0
	addiu	s0, s0, 0x200		# Spin forever at 0xbfc00200
	j	s0			# utlbmiss boot exception vector

        .align      7                   # Align to next exception vector

					# Address = 0xBFC00280.
	lui	s0, 0xbfc0
	addiu	s0, s0, 0x280		# Spin forever at 0xbfc00280
	j	s0			# xutlbmiss boot exception vector

        .align      8                   # Align to next exception vector

					# Address = 0xBFC00380.
	lui	s0, 0xbfc0
	addiu	s0, s0, 0x380		# Spin forever at 0xbfc00380
	j	s0			# "Others" (all other exceptions)

	.align	    8			# Skip to Address 0xbfc00400

rddata:	.word	0x0
	.word	0x55555555
	.word	0xaaaaaaaa
	.word	0xffffffff
	.word	0xdeadbeef
	.word	0xfeedbeef

END (Boot)