ri.vh
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/************************************************************************\
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
\************************************************************************/
// $Id: ri.vh,v 1.1.1.1 2002/05/17 06:14:57 blythe Exp $
`include "rcp.vh"
// bus widths
parameter RI_REG_ADDRESS_SIZE = 3;
parameter RDRAM_REG_ADDRESS_SIZE = 10;
parameter RDRAM_DEVICE_ID_SIZE = 9;
parameter OPERATING_MODE_SIZE = 2;
parameter NUM_MULTIBANKS = 4;
parameter RBUS_REQUEST_SIZE = RBUS_CONTROL_SIZE
+ RBUS_EXTEND_SIZE
+ RBUS_DATA_SIZE;
// operating modes
parameter
RI_RESET_MODE = 0,
RI_ACTIVE_MODE = 1,
RI_STANDBY_MODE = 2;
// register addresses
parameter
RI_MODE_REG = 0,
RI_CONFIG_REG = 1,
RI_CURRENT_LOAD_REG = 2,
RI_SELECT_REG = 3,
RI_REFRESH_REG = 4,
RI_LATENCY_REG = 5,
RI_ERROR_REG = 6,
RI_VALID_REG = 7;
parameter
BANK_SIZE = 3,
ROW_SIZE = 9,
COLUMN_SIZE = 8,
OFFSET_SIZE = 3;
parameter
REQUEST_OP_SIZE = 6,
REQUEST_ADDRESS_SIZE = 36,
REQUEST_COUNT_SIZE = 8;
parameter
OP_READ_MEM_SEQ = 6'b00_0000,
OP_READ_MEM_NSEQ = 6'b01_0000,
OP_WRITE_MEM_SEQ = 6'b00_0100,
OP_WRITE_MEM_NSEQ = 6'b00_1000,
OP_WRITE_MEM_MASK = 6'b00_1100,
OP_READ_REG = 6'b00_0110,
OP_WRITE_REG = 6'b00_0111,
OP_WRITE_REG_GLOBAL = 6'b00_1111;
parameter
RBUS_ENABLE_SHIFT_SIZE = 3,
SERIAL_ADDRESS_SIZE = 8;