// config rdram
t 0000 00000000 00000000 00000000 00000000
// setup rdram-xbus channel
t 0102 0410000c	00000001 00000000 00000000
// poll status to check for xbus_dmem_dma cleared
t 0104 0410000c	00000001 00000001 00000000
//
// check the idle->start->end stalled sequence
//
// start address
t 0102 04100000	00008228 00000000 00000000
// end address
t 0102 04100004	00008230 00000000 00000000
// poll for DP current
t 0107 04100008 0000ffff 00008230 00000000
//
// check the end stalled ->end unstalled->end sequence
//
// end address
t 0102 04100004	00008388 00000000 00000000
// end address, pray we are not stalled yet
t 0102 04100004	00008390 00000000 00000000
// read current to make sure we didn't stall on 1st end address yet
t 0100 04100008 00000000 00000000 00000000
// freeze DP
t 0102 0410000c 00000008 00000000 00000000
// read DP status
t 0100 0410000c 00000000 00000000 00000000
// read current to make sure frozen
t 0100 04100008 00000000 00000000 00000000
// unfreeze DP
t 0102 0410000c 00000004 00000000 00000000
// poll for DP not busy due to fullsync
t 0104 0410000c 00000020 00000001 00000000
q