/*
 * ms.h - Memory Span Unit (functional not register simulator)
 * 
 * This memspan unit ignores how to talk to the IO unit.  It assumes an ideal memory
 * that will not stall.  Spans are not broken into spanlets.  The memory is just accessed 
 * directly and provides the data to the BL at the correct time.
 * 
 * May do a real register level simulation of Bob's memspan later.
 */

#ifndef MS_INCLD

#include "ints.h"

#define MAIN_MEMORY_SIZE	0x300000
#define HIDDEN_FACTOR		8
#define HIDDEN_MEMORY_SIZE	(MAIN_MEMORY_SIZE/HIDDEN_FACTOR)
#define MAX_MEMSPAN_CMDS	4

/* Drawing commands */
/* The following counts are for single cyle mode from NEWSPAN */
/* calculate z & color the clock before they are needed & put on p0 */
#define CLOCKS_TO_START_VALID	1
#define CLOCKS_TO_END_VALID	2
#define CLOCKS_TO_Z_NEEDED	((21 + CLOCKS_TO_END_VALID) - 1)
#define CLOCKS_TO_COLOR_NEEDED	((22 + CLOCKS_TO_END_VALID) - 1)
#define CLOCKS_TO_Z_VALID	(24 + CLOCKS_TO_END_VALID)
#define CLOCKS_TO_COLOR_VALID	(25 + CLOCKS_TO_END_VALID)
#define CLOCKS_2CYCLE_DELAY	2

/* Fill command (no defines, is a software trick) */

/* Copy command */
#define CLOCKS_TO_COPY_VALID	19

/* Load command */
/* clocks from start of command (newspan) */
#define CLOCKS_TO_TCLOAD		10
#define CLOCKS_TO_LOAD_NEEDED		(16 - 1)

/* cycle types */
#define CMD_1CYCLE	(G_CYC_1CYCLE >> G_MDSFT_CYCLETYPE)
#define CMD_2CYCLE	(G_CYC_2CYCLE >> G_MDSFT_CYCLETYPE)
#define CMD_COPY	(G_CYC_COPY   >> G_MDSFT_CYCLETYPE)
#define CMD_FILL	(G_CYC_FILL   >> G_MDSFT_CYCLETYPE)
#define CMD_LOAD	(CMD_FILL + 1)
#define CMD_LOAD_TLUT	(CMD_FILL + 2)

/* other */
#define NUM_COPY_TEXELS 4

enum mscmdstate { MSCMD_IDLE, MSCMD_BUSY };

typedef struct rdram {
    unsigned char *main_addr;
    unsigned char *hidden_addr;
    unsigned long main_size;
    unsigned long hidden_size;
} rdram_t;

/*
 * data for all types of mspan "commands"
 * Could change to union &/or reuse elements, but don't worry about space
 */
typedef struct ms_cmd {
    enum mscmdstate state;
   
 
    /* from ew */
    unsigned long startaddr;	/* pixel address */
    unsigned long endaddr;	/* pixel address */
    unsigned long length;	/* pixel length */
    int cmdtype;
    int num;			/* command number for debugging */
    
    /* clocks in pipe */
    unsigned long clocks;
    
    /* calculated */
    int	dir;
    int skipcnt;
    int validcnt;
    
    /* z reads */
    unsigned long rzaddr;	/* pixel address */
    int rzskip;
    int rzvalidcnt;
    int clockszneeded;
    
    /* color reads */
    unsigned long rcoloraddr;	/* pixel address */
    int rcolorskip;
    int rcolorvalidcnt;
    int clocksclrneeded;
    
    /* z writes */
    unsigned long wzaddr;	/* pixel address */
    int wzskip;
    int wzvalidcnt;
    int clockszvalid;
    
    /* color writes */
    unsigned long wcoloraddr;	/* pixel address */
    int wcolorskip;
    int wcolorvalidcnt;
    int clocksclrvalid;
    
    /* load command */
    unsigned long loadtexaddr;
    int loadtexinc;
    int loadtexvalidcnt;
    
    /* copy command */
    unsigned long copyaddr;
    int copyinc;
    int copyvalidcnt;
} ms_cmd_t;


typedef struct mspan
{
    /* required by C-sim */
    char *label;
    char **argv;
    int argc;
    int gclk_old;
    
    /* Input signals */
    int gclk;
    int gclk_en;
    int reset;
    int capture;
    
    /* from EW */
    int ew_ms_length;
    int ew_ms_addr;	    /* [25:0] */
    int ew_cv_newspan;	    /* 1 bit */
    
    /* from AT */
    int at_color_base;	    /* [25:0] */
    int at_fill_color;	    /* [31:0] */
    int at_color_format;    /* 3 bits */
    int at_color_size;	    /* 2 bits */
    int at_z_base;	    /* 26 bits */
    int at_cycle_type;	    /* 2 bits */
    int at_color_rmw;
    int at_z_rmw;
    int at_z_enable;
    int strobe_sync_full;
    
    
    /* from BL */
    int bl_r;	    /* [7:0] */
    int bl_g;	    /* [7:0] */
    int bl_b;	    /* [7:0] */
    int bl_a;	    /* [2:0] */
    int bl_color_we;
    int bl_z;	    /* [17:0] */
    int bl_z_we;
    
    /* texture interface */
    int at_tex_base;	    /* [25:0] */
    int at_tex_width;	    /* [9:0] */
    int at_tex_size;	    /* [1:0] */
    int at_tex_format;	    /* [2:0] */
    int ew_scissor_load;    /* should have a mspan_load */
    int ms_load_tlut;
    int tex_bus_e;	    /* enable signal for bidirectional bus XXX who drives? */
    int64 tex_bus;	    /* [63:0] */
    int tex_data_valid;
    
    /* output signals */
    /* to BL */
    int bl_mem_r;   /* [7:0] */
    int bl_mem_g;   /* [7:0] */
    int bl_mem_b;   /* [7:0] */
    int bl_mem_a;   /* [2:0] */
    int bl_mem_z;   /* [17:0] */
    int exit;       /* forces simulation to exit */ 
    
    int rel_sync_full;
    
    /* Internal state */
    /* conflict indexes */
    int end_addr_i;

    int reset_negedge;    /* detect negative edge of reset pulse */
    int sync_full;

    
} mspan_t;

/*
 * Function prototypes:
 */
void mspan(mspan_t **pp0, mspan_t **pp1);
void mspan_init(mspan_t *p0, mspan_t *p1);



#endif /* MS_INCLD */