/**************************************************************************
 *                                                                        *
 *               Copyright (C) 1994, Silicon Graphics, Inc.               *
 *                                                                        *
 *  These coded instructions, statements, and computer programs  contain  *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and  *
 *  are protected by Federal copyright law.  They  may  not be disclosed  *
 *  to  third  parties  or copied or duplicated in any form, in whole or  *
 *  in part, without the prior written consent of Silicon Graphics, Inc.  *
 *                                                                        *
 **************************************************************************/

#include <stdio.h>
#include <string.h>

/*
 *  Command Shuffle Unit, for part of CS that runs off of gclk
 *   (gated clock).  Unfortunately, the write address must be
 *   updated in this module based on the ungated clock (clk).
 *   So both clocks are wired to this module.
 */

#include "ints.h"
#include "rdpcmd.h"
#include "csgclk.h"

#define POSEDGECLK 	(save_clk && !save_clk_old)
#define NEGEDGECLK 	(!save_clk && save_clk_old)
#define POSEDGEGCLK 	(save_gclk && !save_gclk_old)
#define NEGEDGEGCLK 	(!save_gclk && save_gclk_old)

/*
 *  G l o b a l s
 */

/* used by bit extraction parser */
extern int64 Source;
extern unsigned short Dest;
extern char GlobString[512];
extern void yyparse(void);

unsigned int ShfMemMs[32]; /* most significant word */
unsigned int ShfMemLs[32]; /* least significant word */

/*
 *  Shuffle Read Table, outputs offset from current read pointer given
 *  state and command.
 */

typedef struct {
  int offset, invert;
} ShuffleReadType;

ShuffleReadType ShuffleReadTab[22][13] = {
/* state | ldtile ldblk  ldtlut flrect txrect filtri shdtri textri sttri  fztri  sztri  tztri  stztri */
{/* 00 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0} },
{/* 01 */  {00,0},{00,0},{00,0},{00,0},{00,0},{01,0},{01,0},{01,0},{01,0},{01,0},{01,0},{01,0},{01,0} },
{/* 02 */  {00,0},{00,0},{00,0},{00,0},{00,0},{02,0},{02,0},{02,0},{02,0},{02,0},{02,0},{02,0},{02,0} },
{/* 03 */  {00,0},{00,0},{00,0},{00,0},{00,0},{03,0},{03,0},{03,0},{03,0},{03,0},{03,0},{03,0},{03,0} },
{/* 04 */  {00,0},{00,0},{00,0},{00,0},{01,0},{00,0},{00,0},{07,1},{15,1},{00,0},{00,0},{07,1},{15,1} },
{/* 05 */  {00,0},{00,0},{00,0},{00,0},{01,0},{00,0},{00,0},{05,1},{13,1},{00,0},{00,0},{05,1},{13,1} },
{/* 06 */  {00,0},{00,0},{00,0},{00,0},{01,0},{00,0},{00,0},{06,1},{14,1},{00,0},{00,0},{06,1},{14,1} },
{/* 07 */  {00,0},{00,0},{00,0},{00,0},{01,0},{00,0},{00,0},{04,1},{12,1},{00,0},{00,0},{04,1},{12,1} },
{/* 08 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{06,1},{00,0},{06,1},{00,0},{06,1},{00,0},{06,1} },
{/* 09 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{04,1},{00,0},{04,1},{00,0},{04,1},{00,0},{04,1} },
{/* 10 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{07,1},{00,0},{07,1},{00,0},{07,1},{00,0},{07,1} },
{/* 11 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{05,1},{00,0},{05,1},{00,0},{05,1},{00,0},{05,1} },
{/* 12 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{04,0},{12,0},{12,0},{20,0} },
{/* 13 */  {00,0},{00,0},{00,0},{00,0},{01,0},{00,0},{00,0},{11,1},{19,1},{00,0},{00,0},{11,1},{19,1} },
{/* 14 */  {00,0},{00,0},{00,0},{00,0},{01,0},{00,0},{00,0},{ 9,1},{17,1},{00,0},{00,0},{ 9,1},{17,1} },
{/* 15 */  {00,0},{00,0},{00,0},{00,0},{01,0},{00,0},{00,0},{10,1},{18,1},{00,0},{00,0},{10,1},{18,1} },
{/* 16 */  {00,0},{00,0},{00,0},{00,0},{01,0},{00,0},{00,0},{ 8,1},{16,1},{00,0},{00,0},{ 8,1},{16,1} },
{/* 17 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{10,1},{00,0},{10,1},{00,0},{10,1},{00,0},{10,1} },
{/* 18 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{ 8,1},{00,0},{ 8,1},{00,0},{ 8,1},{00,0},{ 8,1} },
{/* 19 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{11,1},{00,0},{11,1},{00,0},{11,1},{00,0},{11,1} },
{/* 20 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{ 9,1},{00,0},{ 9,1},{00,0},{ 9,1},{00,0},{ 9,1} },
{/* 21 */  {00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{00,0},{05,0},{13,0},{13,0},{21,0} }
};


/*
 *  Shuffle Muxing Table - these tables have strings which indicate
 *  which bits to extract from the fifo_data word.  There is a table
 *  for each 16b part of the cs_ew_bus.
 *
 * columns 0 (loadtile) and 2 (loadtlut) are identical in these tables. 
 * They didn't use to be the same, but they are now. We could collapse
 *  them but that would be a tedious change of the code below...
 *
 * column 7 is the default case. It might make more sense to have this be
 * located in column 0 instead, but that's a minor nit (the default is
 * used for several commands that just echo the fifo_data verbatim).
 *
 * Note: these scan strings are copied directly from the verilog (csdecode.v)
 * so any change there should be reflected here. It's tedious to check
 * the whole table, so we need to be sure this stays in synch with the
 * verilog.
 *
 * hsa : Wed Aug 31 16:28:03 PDT 1994
 *
 */

/* bits [63:48] */
static char 	*ShuffEWMuxTabS3[22][8] = {
/* ldtile               ldblk                   ldtlut                  flrect                  txrectf                txrect                   tri              default */
{ "[63:56],1'h1,1'h0,3'h0,[26:24]", 		"[63:56],1'h1,1'h0,3'h0,[26:24]", 		"[63:56],1'h1,1'h0,3'h0,[26:24]",	"[63:56],1'h1,1'h0,3'h0,3'h0",		"[63:56],1'h1,1'h0,3'h0,[26:24]", 		"[63:56],1'h1,1'h0,3'h0,[26:24]", 		"[63:48]" ,	"[63:48]" },
{ "6'h0,[23:14]", 	"4'h0,[23:12]", 	"6'h0,[23:14]", 	"6'h0,[55:46]", 	"6'h0,[55:46]", 	"6'h0,[55:46]",		"[63:48]" ,	"[63:48]" },
{ "6'h0,[55:46]", 	"4'h0,[55:44]", 	"6'h0,[55:46]", 	"6'h0,[23:14]", 	"6'h0,[23:14]", 	"6'h0,[23:14]", 	"[63:48]" ,	"[63:48]" },
{ "6'h0,[23:14]", 	"4'h0,[23:12]", 	"6'h0,[23:14]", 	"6'h0,[55:46]", 	"6'h0,[55:46]", 	"6'h0,[55:46]",		"[63:48]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]" ,	"[63:48]" },
{ "1'h0,[55:44],3'h0", 	"1'h0,[55:44],3'h0", 	"1'h0,[55:44],3'h0", 	"16'h0", 		"[63:48]", 		"[63:48]", 		"[63:48]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[20:16],11'h0",	"16'h0", 		"[63:48]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"5{[31]},[31:21]",	"16'h0", 		"[63:48]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]" ,	"[63:48]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]" ,	"[63:48]" },
};

/* bits [47:32] */
static char 	*ShuffEWMuxTabS2[22][8] = {
{ "4'h0,[11:2],2'h3", 	"2'h0,[41:32],2'h3", 	"4'h0,[11:2],2'h3",	"4'h0,[43:34],[33:32]",	"4'h0,[43:34],[33:32]",	"4'h0,[43:34],[33:32]",	"[47:32]",	"[47:32]" },
{ "[13:12],14'h0", 	"16'h0", 		"[13:12],14'h0", 	"[45:44],14'h0", 	"[45:44],14'h0", 	"[45:44],14'h0", 	"[47:32]",	"[47:32]" },
{ "[45:44],14'h0", 	"16'h0", 		"[45:44],14'h0", 	"[13:12],14'h0", 	"[13:12],14'h0", 	"[13:12],14'h0", 	"[47:32]",	"[47:32]" },
{ "[13:12],14'h0", 	"16'h0", 		"[13:12],14'h0", 	"[45:44],14'h0", 	"[45:44],14'h0", 	"[45:44],14'h0", 	"[47:32]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[47:32]" },
{ "1'h0,[43:32],3'h0", 	"1'h0,[43:32],3'h0", 	"1'h0,[43:32],3'h0", 	"16'h0", 		"[47:32]", 		"[47:32]", 		"[47:32]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[4:0],11'h0", 		"[47:32]",	"[47:32]" },
{ "16'h20", 		"16'h20", 		"16'h20", 		"16'h0", 		"16'h0", 		"5{[15]},[15:5]",	"[47:32]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[47:32]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[47:32]" },
};

/* bits [31:16] */
static char 	*ShuffEWMuxTabS1[22][8] = {
{ "4'h0,[11:2],2'h3", 	"2'h0,[41:32],2'h3", 	"4'h0,[11:2],2'h3",	"4'h0,[43:34],[33:32]",	"4'h0,[43:34],[33:32]",	"4'h0,[43:34],[33:32]",	"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[20:16],11'h0",	"[63:48]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"5{[31]},[31:21]",	"[63:48]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[20:16],11'h0",	"16'h0", 		"[63:48]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"5{[31]},[31:21]",	"16'h0", 		"[63:48]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[63:48]",	"[31:16]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[31:16]",	"[31:16]" },
};

/* bits [15:0] */
static char	*ShuffEWMuxTabS0[22][8] = {
{ "4'h0,[43:32]", 	"2'h0,[41:32],2'h0",	"4'h0,[43:32]", 	"4'h0,[11:0]", 		"4'h0,[11:0]", 		"4'h0,[11:0]",	 	"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"[7:0],8'h0", 		"16'h0", 		"16'h0", 		"[4:0],11'h0", 		"16'h0", 		"[47:32]",	"[15:0]" },
{ "16'h0", 		"12'h0,[11:8]",		"16'h0", 		"16'h0", 		"5{[15]},[15:5]", 	"16'h0", 		"[47:32]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[4:0],11'h0", 		"[47:32]",	"[15:0]" },
{ "16'h20", 		"16'h20", 		"16'h20", 		"16'h0", 		"16'h0", 		"5{[15]},[15:5]", 	"[47:32]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[47:32]",	"[15:0]" },
{ "16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"16'h0", 		"[15:0]",	"[15:0]" },
};

/*
 *  Texture Shuffle Muxing Table - these tables have strings which indicate
 *  which bits to extract from the fifo_data word.  There is a table
 *  for each 12b part of the cs_tc_bus. we use one table per 12b in order 
 *  to make it more like the verilog, even at the cost of some more 
 *  confusing parsing below.
 *
 * the last column (8) is the default case (see note above).
 *
 * loadtile and loadtlut are handled with the same case (as in verilog but
 * unlike above).
 *
 * There is only 1 state row (not 22) because the verilog code is the
 * same for each state. Another way of saying this is that the tc_data
 * pipeline is only one word "deep", not 22...
 *
 * hsa : Wed Aug 31 16:33:08 PDT 1994
 *
 */

/* bits [47:36] */
static char *ShuffTXMuxTabS3[9] =
{"1'h0,[55:51],[49:44]",	"[55:44]",	"[55:44]",	"[55:44]",	"[55:44]",	"[55:44]",	"[55:44]",	"[55:44]",	"[55:44]",
};

/* bits [35:24] */
static char *ShuffTXMuxTabS2[9] = 
{"[43:32]",	"[23:12]",	"[23:12]",	"[23:12]",	"[23:12]",	"[23:12]",	"[23:12]",	"[23:12]",	"[23:12]",
};

/* bits [23:12] */
static char *ShuffTXMuxTabS1[9] =
{"[23:12]",	"[43:32]",	"[43:32]",	"[43:32]",	"[43:32]",	"[43:32]",	"[43:32]",	"[43:32]",	"[43:32]",
};

/* bits [11:0] */
static char *ShuffTXMuxTabS0[9] =
{"[11:0]",	"[11:0]",	"[11:0]",	"[11:0]",	"[11:0]",	"[11:0]",	"[11:0]",	"[11:0]",	"[11:0]",
};

/*
 *  shuffle - do the Mike Cai Shuffle(tm) on the RSP data.
 */
static void
  shuffle(int state, int cmd, int *inv, int *offa)
{
  ShuffleReadType off_inv;
  int cmd_indx;

  switch(cmd)
  {
    case LOADTILE:
	cmd_indx = 0;
	break;
    case LOADBLOCK:
	cmd_indx = 1;
	break;
    case LOADTLUT:
	cmd_indx = 2;
	break;
    case FILLRECT:
	cmd_indx = 3;
	break;
    case TEXRECTFLIP:
    case TEXRECT:
	cmd_indx = 4;
	break;
    case TRIFILL:
	cmd_indx = 5;
	break;
    case TRISHADE:
	cmd_indx = 6;
	break;
    case TRITXTR:
	cmd_indx = 7;
	break;
    case TRISHADETXTR:
	cmd_indx = 8;
	break;
    case TRIFILLZBUFF:
	cmd_indx = 9;
	break;
    case TRISHADEZBUFF:
	cmd_indx = 10;
	break;
    case TRITXTRZBUFF:
	cmd_indx = 11;
	break;
    case TRISHADETXTRZBUFF:
	cmd_indx = 12;
	break;
    default:
	cmd_indx = 0;
	break;
  }

  *offa = ShuffleReadTab[state][cmd_indx].offset;
  *inv  = ShuffleReadTab[state][cmd_indx].invert;
}



/*
 *  partial_decode - look ahead at the current command and state to derive some
 *  pretty darn important signals.
 */
static void
    partial_decode(int imm_cmd, int shf_state, int *one_word_cmd, 
		   int *sync_tile, int *sync_pipe, 
		   int *sync_full, int *sync_load,
		   int *size_prim)
{
    *sync_tile = 0;
    *sync_pipe = 0;
    *sync_full = 0;
    *sync_load = 0;
    *one_word_cmd = 0;
    
    if (shf_state == 0) {
	switch(imm_cmd) {
	  case FULLSYNC:
	    *sync_full = 1;
	    *one_word_cmd = 1;
	    break;
	  case TILESYNC:
	    *sync_tile = 1;
	    *one_word_cmd = 1;
	    break;
	  case PIPESYNC:
	    *sync_pipe = 1;
	    *one_word_cmd = 1;
	    break;
	  case LOADSYNC:
	    *sync_load = 1;
	    *one_word_cmd = 1;
	    break;
	  case SETBLENDCOLOR:
	  case SETFOGCOLOR:
	  case SETFILLCOLOR:
	  case SETSCISSOR:
	  case SETCONVERT:
	  case SETKEYR:
	  case SETKEYGB:
	  case SETRDPOTHER:
	  case SETPRIMDEPTH:
	  case NOOP:
	    *one_word_cmd = 1;
	    break;
	  case SETTILE:
	  case SETTILESIZE:
	    *one_word_cmd = 1;
	    break;
	  case LOADTILE:
	  case LOADBLOCK:
	  case LOADTLUT:
	  case FILLRECT:
	  case TEXRECT:
	  case TEXRECTFLIP:
	  case TRIFILL:
	  case TRISHADE:
	  case TRITXTR:
	  case TRISHADETXTR:
	  case TRIFILLZBUFF:
	  case TRISHADEZBUFF:
	  case TRITXTRZBUFF:
	  case TRISHADETXTRZBUFF:
	    *one_word_cmd = 0;
	    break;
	  default:
	    *one_word_cmd = 1;
	    break;
	}
    }

  switch(imm_cmd)
  {
    case FILLRECT:
	*size_prim = 0x1;
	break;
    case TEXRECTFLIP:
    case TEXRECT:
	*size_prim = 0x2;
	break;
    case TRIFILL:
	*size_prim = 0x4;
	break;
    case TRISHADE:
	*size_prim = 0xc;
	break;
    case TRITXTR:
	*size_prim = 0xc;
	break;
    case TRISHADETXTR:
	*size_prim = 0x14;
	break;
    case TRIFILLZBUFF:
	*size_prim = 0x6;
	break;
    case TRISHADEZBUFF:
	*size_prim = 0xe;
	break;
    case TRITXTRZBUFF:
	*size_prim = 0xe;
	break;
    case TRISHADETXTRZBUFF:
	*size_prim = 0x16;
	break;
    case LOADTILE:
    case LOADBLOCK:
    case LOADTLUT:
	*size_prim = 0x1;
	break;
    default:
	*size_prim = 0x1;
	break;
  }
}

/*
 *  shuffle_mux - Do shuffle mux on fifo data, output directly on pins
 *      
 */
static void
    shuffle_mux(csgclk_t *p0, csgclk_t *p1)
{
  int tc_cmd_indx, ew_cmd_indx;

  /* this is the same for every command */
  Source = p1->fifo_data;
  strcpy(GlobString, "[26:24]\n");
  yyparse();
  p0->tile_addr = Dest;

/*
fprintf(stderr,"SHUFFLEMUX:  FD=0x%08X  cmd=%02X"
,p1->fifo_data.word1
,p1->cmd
);
*/

  switch(p1->cmd)
  {
    case SETTILE:
	ew_cmd_indx = 7;
	tc_cmd_indx = 0;
	p0->we_tile_size = 0;
	p0->we_tile_attr = p1->stop_wen;
	break;
    case SETTILESIZE:
	ew_cmd_indx = 7;
	tc_cmd_indx = 1;
	p0->we_tile_size = p1->stop_wen;
	p0->we_tile_attr = 0;
	break;
    case LOADTILE:
	ew_cmd_indx = 0;
	tc_cmd_indx = 2;
	if (p1->delay_state == 0) {
	    p0->we_tile_size = p1->stop_wen;
	    p0->we_tile_attr = 0;
	} else {
	    p0->we_tile_size = 0;
	    p0->we_tile_attr = 0;
	}
	break;
    case LOADBLOCK:
	ew_cmd_indx = 1;
	tc_cmd_indx = 3;
	if (p1->delay_state == 0) {
	    p0->we_tile_size = p1->stop_wen;
	    p0->we_tile_attr = 0;
	} else {
	    p0->we_tile_size = 0;
	    p0->we_tile_attr = 0;
	}
	break;
    case LOADTLUT:
	ew_cmd_indx = 2;
	tc_cmd_indx = 2;
	if (p1->delay_state == 0) {
	    p0->we_tile_size = p1->stop_wen;
	    p0->we_tile_attr = 0;
	} else {
	    p0->we_tile_size = 0;
	    p0->we_tile_attr = 0;
	}
	break;
    case FILLRECT:
	ew_cmd_indx = 3;
	tc_cmd_indx = 4;
	p0->we_tile_size = 0;
	p0->we_tile_attr = 0;
	break;
    case TEXRECTFLIP:
	ew_cmd_indx = 4;
	tc_cmd_indx = 5;
	p0->we_tile_size = 0;
	p0->we_tile_attr = 0;
	break;
    case TEXRECT:
	ew_cmd_indx = 5;
	tc_cmd_indx = 6;
	p0->we_tile_size = 0;
	p0->we_tile_attr = 0;
	break;
    case TRIFILL:
    case TRISHADE:
    case TRITXTR:
    case TRISHADETXTR:
    case TRIFILLZBUFF:
    case TRISHADEZBUFF:
    case TRITXTRZBUFF:
    case TRISHADETXTRZBUFF:
	ew_cmd_indx = 6;
	tc_cmd_indx = 7;
	p0->we_tile_size = 0;
	p0->we_tile_attr = 0;
	break;
    default:
	ew_cmd_indx = 7;
	tc_cmd_indx = 8;
	p0->we_tile_size = 0;
	p0->we_tile_attr = 0;
	break;
  }

  /* 
   *  extract proper fields from fifo_data and place on
   *  cs_ew_data bus.  Parser grabs command from GlobString,
   *  the source 64b word from Source, and places the extracted
   *  bits in Dest.
   */
  Source = p1->fifo_data;
  strcpy(GlobString, ShuffEWMuxTabS3[p1->delay_state][ew_cmd_indx]);
  strcat(GlobString, "\n");
  yyparse();
  p0->cs_ew_data.word1 = ((unsigned long) Dest) << 16;

  strcpy(GlobString, ShuffEWMuxTabS2[p1->delay_state][ew_cmd_indx]);
  strcat(GlobString, "\n");
  yyparse();
  p0->cs_ew_data.word1 |= (unsigned long) Dest;

  strcpy(GlobString, ShuffEWMuxTabS1[p1->delay_state][ew_cmd_indx]);
  strcat(GlobString, "\n");
  yyparse();
  p0->cs_ew_data.word0 = ((unsigned long) Dest) << 16;

  /* fix up texel-size specific field: */
  if ((p1->cmd == LOADTILE || p1->cmd == LOADBLOCK || p1->cmd == LOADTLUT) &&
      p1->delay_state == 5) {
      switch (p1->texel_size) {
	case 0:
	  p0->cs_ew_data.word0 = 0x02000000;
	  break;
	case 1:
	  p0->cs_ew_data.word0 = 0x01000000;
	  break;
	case 2:
	  p0->cs_ew_data.word0 = 0x00800000;
	  break;
	case 3:
	  p0->cs_ew_data.word0 = 0x00400000;
	  break;
	default:
	  p0->cs_ew_data.word0 = 0x00000000;
	  break;
      }
      /* loadblock use 12.3 not 10.5 */
      if (p1->cmd == LOADBLOCK)
	  p0->cs_ew_data.word0 >>= 2;
  }

  strcpy(GlobString, ShuffEWMuxTabS0[p1->delay_state][ew_cmd_indx]);
  strcat(GlobString, "\n");
  yyparse();
  p0->cs_ew_data.word0 |= (unsigned long) Dest;

  /* fix up copy_fill specific fields */
  if ((p1->cmd == FILLRECT || p1->cmd == TEXRECTFLIP || p1->cmd == TEXRECT) &&
      (p1->delay_state == 0) && p1->copy_fill) {
    p0->cs_ew_data.word1 |= 0x00000003;
    p0->cs_ew_data.word0 |= 0x00030000;
  }

  /*
   *  Tile data
   */
  /* 
   *  extract proper fields from fifo_data and place on
   *  cs_tc_data bus.  Parser grabs command from GlobString,
   *  the source 64b word from Source, and places the extracted
   *  bits in Dest.
   */
  Source = p1->fifo_data;

  strcpy(GlobString, ShuffTXMuxTabS3[tc_cmd_indx]);
  strcat(GlobString, "\n");
  yyparse();
  p0->cs_tc_data.word1 = ((unsigned long) Dest) << 4;

  strcpy(GlobString, ShuffTXMuxTabS2[tc_cmd_indx]);
  strcat(GlobString, "\n");
  yyparse();
  p0->cs_tc_data.word1 |= ((unsigned long) Dest) >> 8;
  p0->cs_tc_data.word0 = (((unsigned long) Dest) & 0x00ff) << 24;

  strcpy(GlobString, ShuffTXMuxTabS1[tc_cmd_indx]);
  strcat(GlobString, "\n");
  yyparse();
  p0->cs_tc_data.word0 |= ((unsigned long) Dest) << 12;

  strcpy(GlobString, ShuffTXMuxTabS0[tc_cmd_indx]);
  strcat(GlobString, "\n");
  yyparse();
  p0->cs_tc_data.word0 |= ((unsigned long) Dest);

/*
fprintf(stderr," EWOUT=0x%08X %08X\n"
,p0->cs_ew_data.word1
,p0->cs_ew_data.word0
);
*/

}




/*
 *  command shuffle unit, interface routine
 *
 */
void
  csgclk(csgclk_t **pp0, csgclk_t **pp1)
{
  csgclk_t *p0, *p1;
  int save_clk;
  int save_clk_old;
  int save_gclk;
  int save_gclk_old;

  int flip;
  int words_fifo;           /* number of words in FIFO, from csclk */
  int empty;                /* fifo empty signal, from csclk */

  /* intermediate signals */
  int rm_adrs;  /* [4:0], ms read address */
  int rl_adrs;  /* [4:0], ls read address */
  int update_shf; /* flag */
  int inc, noinc;

  int64 fifo_out;  /* fifo read data */

  int state_zero;  
  int imm_cmd;  
  int one_word_cmd;
  int sync_tile;
  int sync_pipe;
  int sync_full;
  int sync_load;
  int sync_none;
  int pipe_busy;
  int size_prim;
  int sel_inverse;
  int offa;
  int inv_offa;
  int inc_shf_state;
  int update_rpt;
  int unwrap;
  int start_prim_m;
  int wr_adrs;

  p0 = *pp0;
  p1 = *pp1;
  save_gclk     = p0->gclk;
  save_gclk_old = p1->gclk_old;
  save_clk      = p0->clk;
  save_clk_old  = p1->clk_old;


  /* 
   *  explicitly copy clock domain signals rather than swap
   *  pointers since we have both clock domains in this file
   */
  if(POSEDGECLK)
  {
    /* transfer all next-clock register values to register outputs. */
    p1->wr_adrs = p0->wr_adrs;
    p1->clk_count = p0->clk_count;
  }

  /* 
   *  explicitly copy gclock domain signals rather than swap
   *  pointers since we have both clock domains in this file
   */
  if(POSEDGEGCLK)
  {
    /* transfer all next-clock register values to register outputs. */
    /* inputs */
    p1->ew_cs_busy = p0->ew_cs_busy;
    p1->ms_busy = p0->ms_busy;
    p1->rel_sync_tile = p0->rel_sync_tile;
    p1->rel_sync_pipe = p0->rel_sync_pipe;
    p1->rel_sync_full = p0->rel_sync_full;
    p1->rel_sync_load = p0->rel_sync_load;
    p1->texel_size = p0->texel_size;
    p1->copy_fill = p0->copy_fill;
    p1->reset_l = p0->reset_l;

    /* outputs */
    p1->pre_req_dma = p0->pre_req_dma;
    p1->tile_addr = p0->tile_addr;
    p1->cs_tc_data = p0->cs_tc_data;
    p1->we_tile_size = p0->we_tile_size;
    p1->we_tile_attr = p0->we_tile_attr;
    p1->cs_ew_data = p0->cs_ew_data;
    p1->cs_ew_newprim = p0->cs_ew_newprim;
    p1->cmd = p0->cmd;
    p1->start_prim = p0->start_prim;
    p1->attr_valid = p0->attr_valid;
    p1->cmd_busy = p0->cmd_busy;

    /* internal */
    p1->read_adrs = p0->read_adrs;
    p1->shf_state = p0->shf_state;
    p1->cmd_size = p0->cmd_size;
    p1->delay_state = p0->delay_state;
    p1->fifo_data = p0->fifo_data;
    p1->sync_tile_state = p0->sync_tile_state;
    p1->sync_pipe_state = p0->sync_pipe_state;
    p1->sync_full_state = p0->sync_full_state;
    p1->sync_load_state = p0->sync_load_state;
    p1->stop_wen = p0->stop_wen;
    p1->empty_delay = p0->empty_delay;

    p1->gclk_count = p0->gclk_count;
  }

  /* 
   * find words_fifo, empty, and pre_req_dma (in the clock domain; must use
   * value of wr_adrs which existed before the clock state swap) 
   */

  if(POSEDGECLK)
  {
    unwrap = ~(p1->wr_adrs & 0x20) & (p1->read_adrs & 0x20);
    words_fifo = (((unwrap ^ (p1->wr_adrs & 0x20)) | (p1->wr_adrs & 0x1f)) -
		((unwrap ^ (p1->read_adrs & 0x20)) | (p1->read_adrs & 0x1f)));
    words_fifo &= 0x3f;

    p0->pre_req_dma = (words_fifo <= 0x16);

    p0->clk_count = p1->clk_count + 1;
  }


  if(POSEDGEGCLK)
  {
    /* Update all next-clock register values */
    empty = words_fifo == 0;
  

    /* determine read addresses */
    shuffle(p1->shf_state, p1->cmd, &sel_inverse, &offa);
    inv_offa = (offa ^ sel_inverse) & 0x1f;
    rm_adrs = (offa + (p1->read_adrs & 0x1f)) & 0x1f;
    rl_adrs = (inv_offa + (p1->read_adrs & 0x1f)) & 0x1f;

    update_shf = p1->shf_state == 0x15;
    inc = update_shf ? 0 : p1->shf_state + 1;
    noinc = update_shf ? 0 : p1->shf_state;
 
    /* latch fifo read data */
    fifo_out.word0 = ShfMemLs[rl_adrs]; /* least significant word */
    fifo_out.word1 = ShfMemMs[rm_adrs]; /* most significant word */

    imm_cmd = ((fifo_out.word1 & 0x3f000000) >> 24);

    pipe_busy = p1->ew_cs_busy || p1->ms_busy;
    state_zero = (p1->shf_state == 0x0);

    /* do partial decode */
    partial_decode(imm_cmd, p1->shf_state, &one_word_cmd,
		   &sync_tile, &sync_pipe, &sync_full, &sync_load,
		   &size_prim);


    sync_none = !(p1->sync_tile_state || p1->sync_pipe_state ||
		  p1->sync_full_state || p1->sync_load_state);

    update_rpt = ((one_word_cmd && !pipe_busy) || update_shf) &&
		 !empty && sync_none;

    start_prim_m = (words_fifo >= size_prim) && !one_word_cmd && !pipe_busy &&
		   !empty && sync_none;
    inc_shf_state = state_zero ? start_prim_m : 1;

    p0->cs_ew_newprim = inc_shf_state; /* async output */
    /*p1->cs_ew_newprim = p0->cs_ew_newprim;*/

    p0->cmd = state_zero ? (empty ? 0 : imm_cmd) : p1->cmd;
    p0->cmd_size = state_zero ? size_prim : p1->cmd_size;
    p0->start_prim = state_zero ? start_prim_m : 0x0;
    p0->delay_state = p1->shf_state; /* delay shuffle state */
    p0->fifo_data = fifo_out; /* delay fifo read data one clock */
    p0->attr_valid = one_word_cmd && !pipe_busy && !empty  && sync_none;
    p0->cmd_busy = !empty;
  
    /* update shuffle state */
    if (!p1->reset_l)
      p0->shf_state = 0;
    else
      p0->shf_state = inc_shf_state ? inc : noinc;

    if (!p1->reset_l) {
      p0->sync_tile_state = 0;
      p0->sync_pipe_state = 0;
      p0->sync_full_state = 0;
      p0->sync_load_state = 0;
    }
    else
    {
      /* update syncs */

      p0->sync_tile_state =
        (!p1->sync_tile_state && sync_tile && !empty && !pipe_busy && sync_none) || 
        (p1->sync_tile_state && !p1->rel_sync_tile);

      p0->sync_pipe_state =
        (!p1->sync_pipe_state && sync_pipe && !empty && !pipe_busy && sync_none) || 
        (p1->sync_pipe_state && !p1->rel_sync_pipe);

      p0->sync_full_state =
        (!p1->sync_full_state && sync_full && !empty && !pipe_busy && sync_none) || 
        (p1->sync_full_state && !p1->rel_sync_full);

      p0->sync_load_state =
        (!p1->sync_load_state && sync_load && !empty && !pipe_busy && sync_none) || 
        (p1->sync_load_state && !p1->rel_sync_load);
    }

    /* update read address */

    if(!p1->reset_l)
      p0->read_adrs = 0;
    else if(one_word_cmd)
      p0->read_adrs = update_rpt ? p1->read_adrs + 1 : p1->read_adrs;
    else
      p0->read_adrs = update_rpt ? p1->read_adrs + p1->cmd_size : p1->read_adrs;

    /* 
     * do output data muxing, write directly to pins 
     * (use delayed empty signal) 
     */
    p0->stop_wen = (sync_none && !empty && !pipe_busy);
    shuffle_mux(p0, p1);

    p0->gclk_count = p1->gclk_count + 1;
  }

/*
fprintf(stderr,"STP=%d EWD=0x%08X CMD=%02X NP=%d SPM=%d SZ=%d FD=0x%08X FO=0x%08X OWC=%d %c\n"
,p1->start_prim
,p1->cs_ew_data.word1
,p1->cmd
,p1->cs_ew_newprim
,start_prim_m
,state_zero
,p1->fifo_data.word1
,fifo_out.word1
,one_word_cmd
,POSEDGE?'^':'v'
);
*/

  /*
   *  Clock signals are really variables so change both
   *  structures.
   */
  p0->gclk_old = p1->gclk_old = save_gclk;
  p0->clk_old = p1->clk_old = save_clk;
}


/*
 *  command shuffle unit initialization
 */
void
  csgclk_init(csgclk_t *p0, csgclk_t *p1)
{
    p0->gclk = p1->gclk = 0;
    p0->clk = p1->clk = 0;
    p0->gclk_old = p1->gclk_old = 0;
    p0->clk_old = p1->clk_old = 0;
    p0->clk_count = p1->clk_count = 0;
    p0->gclk_count = p1->gclk_count = 0;
}