asetup.s
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/*************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
************************************************************************/
/* asetup.s */
#########################################################################
#
# Clear a DMEM buffer
.ent aclear_buff
.name dmemstart,$1
.name count, $2
.name vzero, $v1
case_A_CLEARBUFF:
andi count, aud1, 0xffff
vxor vzero, vzero, vzero
andi dmemstart, aud0, 0xffff
addi dmemstart, dmemstart, RSP_BUFFER_OFFSET
cbloop: sdv vzero[0], 0(dmemstart)
sdv vzero[0], 8(dmemstart)
addi count, count, -16
bgtz count, cbloop
addi dmemstart, dmemstart, 16
j AudDone
addi dlcount, dlcount, -8
.unname dmemstart
.unname count
.unname vzero
.end aclear_buff
########################################################################
#
# DMA loading and saving DMEM buffers from/to DRAM
.ent aload_buff
.name dm_in, $1
.name dr_addr, $2
.name count, $3
#######################
#
# load buffer
case_A_LOADBUFF:
sll count, aud0, 8
srl count, count, 20
beq count, zero, AudDone
addi dlcount, dlcount, -8
andi dm_in, aud0, 0x0fff
addi dm_in, dm_in, RSP_BUFFER_OFFSET
sll dr_addr, aud1, 8
srl dr_addr, dr_addr, 8
addi count, count, -1
jal DMAread
addi dr_addr, dr_addr, 0
mfc0 $1, DMA_BUSY
LBwait: bne $1, zero, LBwait
mfc0 $1, DMA_BUSY
j AudDone
mtc0 $0, SP_RESERVED
.unname dm_in
.end aload_buff
#######################
#
# save buffer
.ent asave_buff
.name dm_out, $1
case_A_SAVEBUFF:
sll count, aud0, 8
srl count, count, 20
beq count, zero, AudDone
addi dlcount, dlcount, -8
andi dm_out, aud0, 0x0fff
addi dm_out, dm_out, RSP_BUFFER_OFFSET
sll dr_addr, aud1, 8
srl dr_addr, dr_addr, 8
addi count, count, -1
jal DMAwrite
addi dr_addr, dr_addr, 0
mfc0 $1, DMA_BUSY
SBwait: bne $1, zero, SBwait
mfc0 $1, DMA_BUSY
j AudDone
mtc0 $0, SP_RESERVED
.unname dm_out
.end asave_buff
#########################################################################
#
# Load ADPCM coefficient table
.ent aload_adpcm
.name dm_in, $1
case_A_LOADADPCM:
sll dr_addr, aud1, 8
srl dr_addr, dr_addr, 8
addi dr_addr, dr_addr, 0
addi dm_in, zero, RSP_ADPCMTABLE_OFFSET
andi count, aud0, 0xffff
jal DMAread
addi count, count, -1
mfc0 $1, DMA_BUSY
LAwait: bne $1, zero, LAwait
mfc0 $1, DMA_BUSY
mtc0 $0, SP_RESERVED
j AudDone
addi dlcount, dlcount, -8
.unname dm_in
.unname dr_addr
.unname count
.end aload_adpcm
########################################################################
#
# Set the volume parameters in DMEM.
.ent aset_vol
.name tmp1, $1
.name tmp2, $2
.name flags, $3
case_A_SETVOL:
srl flags, aud0, 16
andi tmp1, flags, A_VOL
beq tmp1, zero, sv_chrate
andi tmp1, flags, A_LEFT
beq tmp1, zero, sv_volR
srl tmp2, aud1, 16
sh aud0, AL_ENVMIXER_PARAMETER_VOLL(scrbase)
sh tmp2, AL_ENVMIXER_PARAMETER_DRYAMT(scrbase)
sh aud1, AL_ENVMIXER_PARAMETER_WETAMT(scrbase)
j AudDone
addi dlcount, dlcount, -8
sv_volR: sh aud0, AL_ENVMIXER_PARAMETER_VOLTGTR(scrbase)
sh tmp2, AL_ENVMIXER_PARAMETER_VOLRATERM(scrbase)
sh aud1, AL_ENVMIXER_PARAMETER_VOLRATERL(scrbase)
j AudDone
addi dlcount, dlcount, -8
sv_chrate: srl tmp2, aud1, 16
sh aud0, AL_ENVMIXER_PARAMETER_VOLTGTL(scrbase)
sh tmp2, AL_ENVMIXER_PARAMETER_VOLRATELM(scrbase)
sh aud1, AL_ENVMIXER_PARAMETER_VOLRATELL(scrbase)
j AudDone
addi dlcount, dlcount, -8
.unname tmp1
.unname tmp2
.unname flags
.end aset_vol
########################################################################
#
# Interleave two DMEM buffers
.ent ainterleave
.name count, $1
.name inpl, $2
.name inpr, $3
.name outp, $4
.name left, $v1
.name right, $v2
case_A_INTERLEAVE:
addi count, zero, AL_ALL_COUNTER
addi outp, zero, AL_INTERLEAVE_OUT
addi inpl, zero, AL_INTERLEAVE_L_IN
addi inpr, zero, AL_INTERLEAVE_R_IN
INTERloop1: lqv left[0], 0(inpl)
lqv right[0], 0(inpr)
addi count, count, -16
addi inpl, inpl, 16
addi inpr, inpr, 16
ssv left[0], 0(outp)
ssv right[0], 2(outp)
ssv left[2], 4(outp)
ssv right[2], 6(outp)
ssv left[4], 8(outp)
ssv right[4], 10(outp)
ssv left[6], 12(outp)
ssv right[6], 14(outp)
ssv left[8], 16(outp)
ssv right[8], 18(outp)
ssv left[10], 20(outp)
ssv right[10], 22(outp)
ssv left[12], 24(outp)
ssv right[12], 26(outp)
ssv left[14], 28(outp)
ssv right[14], 30(outp)
bgtz count, INTERloop1
addi outp, outp, 32
j AudDone
addi dlcount, dlcount, -8
.unname count
.unname inpl
.unname inpr
.unname outp
.unname left
.unname right
.end ainterleave
########################################################################
#
# Move an area of DMEM
.ent admem_move
.name count, $1
.name inpp, $2
.name outp, $3
.name tmp0, $v1
.name tmp1, $v2
case_A_DMMOVE:
andi count, aud1, 0xffff
andi inpp, aud0, 0xffff
addi inpp, inpp, RSP_BUFFER_OFFSET
srl outp, aud1, 16
addi outp, outp, RSP_BUFFER_OFFSET
DMEMloop1: ldv tmp0[0], 0(inpp)
ldv tmp1[0], 8(inpp)
addi count, count, -16
addi inpp, inpp, 16
sdv tmp0[0], 0(outp)
sdv tmp1[0], 8(outp)
bgtz count, DMEMloop1
addi outp, outp, 16
j AudDone
addi dlcount, dlcount, -8
.unname count
.unname inpp
.unname outp
.unname tmp0
.unname tmp1
.end admem_move
########################################################################
#
# Set the loop state address
.ent aset_lstate
.name dr_addr, $1
case_A_SETLSTATE:
sll dr_addr, aud1, 8
srl dr_addr, dr_addr, 8
addi dr_addr, dr_addr, 0
sw dr_addr, AL_ADPCM_PARAMETER_LSTATE(zero)
j AudDone
addi dlcount, dlcount, -8
.unname dr_addr
.end aset_lstate